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Código Blink Led por ciclos

module blink (
input i_clk,             // clock: 24MHz
output reg o_led = 0     // this time o_led is a registered output
);
reg [31:0] counter = 0;
always @(posedge i_clk) begin
    counter <= counter + 1'b1;
    if (counter == 12e6) begin
        o_led <= ~o_led;  // toggle output
        counter <= 0;     // reset to zero
    end 
end
endmodule